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september 2011 doc id 022198 rev 1 1/23 23 STC3105 battery monitor ic with alarm ou tput for gas gauge applications features 0.5% accuracy battery voltage monitoring low battery alarm output with programmable thresholds low power: 60 a in power-saving mode, 2 a max in standby mode ideal for implementation of robust gas gauge systems using open-circuit voltage and coulomb counter methods small 3x2 mm package applications mobile phones, multimedia players, digital cameras portable medical equipment description the STC3105 battery monitor includes the hardware functions required to implement a low- cost gas gauge for battery monitoring. the STC3105 uses accurate measurements of the battery voltage to estimate a battery?s state-of- charge (soc). it uses a low cost sense resistor to precisely sense the charge or discharge states, detect light-load conditions without ambiguity for voltage measurements, and accurate soc calculation. the coulomb counter method is used for soc tracking in high-load conditions. an alarm output signals a low soc condition, and can also indicate low battery voltage. the alarm threshold levels are programmable. the device is programmable through an i 2 c interface. tdfn8 3 x2 (pl as tic microp a ck a ge) 1 2 3 4 5 6 7 8 alm s cl gnd cg vin s da vcc nc pin connection s (top view) www.st.com
contents STC3105 2/23 doc id 022198 rev 1 contents 1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 absolute maximum ratings and operating conditions . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.1 battery monitoring functions and operating modes . . . . . . . . . . . . . . . . . 10 6.2 battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.3 current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.4 coulomb counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.5 alarm output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.6 battery voltage relaxation timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.7 timing diagram in run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7i 2 c interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 read and write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 8 8.1 tdfn8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 9 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
STC3105 block diagram doc id 022198 rev 1 3/23 1 block diagram figure 1. STC3105 internal block diagram !$converter !ccumulatorsand controlregisters ) # interface 6). '.$ 3$! 3#, 6## !larmoutput #' (z timebase 6 reference !,- 2!-)$registers -58 /scillator #' #' '!0-3-$
pin assignment STC3105 4/23 doc id 022198 rev 1 2 pin assignment note: i: input o: output od: open drain a: analog d: digital table 1. STC3105 pin description pin pin name type function 1 alm i/od alarm signal output, open drain, external pull-up resistor is required 2 sda i/od i 2 c serial data 3scl i_di 2 c serial clock 4 gnd ground analog and digital ground 5 cg i_a current sensing input 6 nc reserved test pin. do not connect. 7 vcc supply power supply 8 vin i_a battery voltage sensing input
STC3105 absolute maximum ratings and operating conditions doc id 022198 rev 1 5/23 3 absolute maximum ratings and operating conditions table 2. absolute maximum ratings symbol parameter value unit v ccmax maximum voltage on vcc pin 7 v v io voltage on i/o pins -0.3 to 7 v t stg storage temperature -55 to 150 c t j maximum junction temperature 150 c esd electrostatic discharge (hbm: human body model) 2 kv table 3. operating conditions symbol parameter value unit v cc operating supply voltage on v cc 2.7 to 5.5 v v min minimum voltage on v cc for ram content retention 2.0 v t oper operating free air temperature range -40 to 85 c
electrical characteristics STC3105 6/23 doc id 022198 rev 1 4 electrical characteristics table 4. electrical characteristics (2.7 v < v cc < 4.5 v, -20 c to 70 c) symbol parameter conditions min typ max units supply i cc operating current consumption average value over 4 s in: ? power-saving mode ? active mode 60 - 70 100 a a i stby current consumption in standby standby mode, inputs=0v 2 a i pdn current consumption in power-down v cc < uvlo th , inputs=0v 1 a uvlo th undervoltage threshold (v cc decreasing) 2.5 2.6 2.7 v uvlo hyst undervoltage threshold hysteresis 100 mv por power-on reset threshold (v cc decreasing) 2.0 v current sensing vin_gg input voltage range -80 +80 mv i in input current for cg pin 500 na adc_res ad converter granularity 11.77 v adc_offset ad converter offset cg = 0 v -3 3 lsb adc_time ad conversion time 500 ms adc_acc ad converter gain accuracy at full scale (using external sense resistor) 25 c over temperature range 0.5 - - 1 % % f osc internal time base frequency 32768 hz osc_acc internal time base accuracy 25 c, v cc =3.6v over temperature and voltage ranges 2 2.5 % % cur_res current register lsb value 11.77 v chg_res charge register lsb value =cur_res*2^12*0.5/3600 6.70 vh
STC3105 electrical characteristics doc id 022198 rev 1 7/23 battery voltage measurement vin_adc input voltage range 0 5 v lsb lsb value 2.44 mv adc_time ad conversion time 250 ms volt_acc battery voltage measurem ent accuracy 2.7 v electrical characteristics STC3105 8/23 doc id 022198 rev 1 figure 2. i 2 c timing diagram table 5. i 2 c timing - v io =2. 8 v, t amb = -20 c to 70 c (unless otherwise specified) symbol parameter conditions min typ max unit f scl scl clock frequency - 0 - 400 khz t hd,sta hold time (repeated) start condition 0.6 s t low low period of the scl clock 1.3 s t high high period of the scl clock 0.6 s t su,dat setup time for repeated start condition 0.6 s t hd,dat data hold time 0 0.9 s t su,dat data setup time 100 ns t r rise time of both sda and scl signals 20+ 0.1c b 300 ns t f fall time of both sda and scl signals 20+ 0.1c b 300 ns t su,sto setup time for stop condition 0.6 s t buf bus free time between a stop and start condition 1.3 s c b capacitive load for each bus line 400 pf 3$! t f 3#, t low 6 il t hdsta t r t hddat t sudat t high t susta 6 ih '!0-3-$
STC3105 application information doc id 022198 rev 1 9/23 5 application information figure 3. example of an application schematic using the STC3105 table 6. external component list name value tolerance comments rcg 10 to 50 m ? 2% to 5% current sense resistor c1 1 f supply decoupling capacitor c2 220 nf battery voltage input filter (optional) r1 1 k ? battery voltage input filter (optional) )/voltage 34# !,- '.$ 3$! 3#, #' 6). 2cg 2 6## # /ptionalfilter # '!0-3-$
functional description STC3105 10/23 doc id 022198 rev 1 6 functional description 6.1 battery monitoring func tions and operating modes the monitoring functions include the measurement of the battery voltage and battery current. a coulomb counter is used to track the state-of-charge when the battery is charging or is discharging at a high rate. a 14-bit si gma-delta a/d converter is used to measure both the voltage and current. the STC3105 can operate in two modes with different power consumption. the selection is made by the pwr_save bit in the register 0 (refer to table 11 on page 17 for register 0 definition). in power-saving mode, the current is measured only half of the time. this saves about half of the power consumption. in active mode, the current is continuously measured (except for one conversion cycle used every 4 seconds for the voltage measurement). this provides the highest accuracy from the coulomb counter. when the battery voltage falls below the undervoltage lockout threshold of 2.7 v, the monitoring functions are stopped and the STC3105 stays in power-down mode with minimum quiescent current. all registers are maintained down to 2.0 v. below 2.0 v, the registers are reset to their default power-on values. by writing 0 to the gg_run bit in register 0, the STC3105 measurement is automatically stopped and the register values are frozen and unchanged. after the gg_run bit is again set to 1, the STC3105 continues to measure from the point it was stopped. 6.2 battery voltage monitoring the battery voltage is measured by using one conversion cycle of the a/d converter every 4 seconds. the conversion cycle takes 2 13 = 8192 clock cycles. using the 32768 hz internal clock, the conversion cycle time is 250 ms. the voltage range is 0 to 5 v, and the resolution is 2.44 mv. the accuracy of the voltage measurement is 0.5% over the temperature range. this allows accurate state-of-charge information from the battery open-circuit voltage. 6.3 current sensing the voltage drop across the sense resistor is integrated during a conversion period and input to the 14-bit sigma-delta a/d converter. using the 32768 hz internal clock, the conv ersion cycle time is 500 ms for a 14-bit resolution. the lsb value is 11.77 v. the a/d converter output is in two ? s complement format. when a conversion cycle is completed, the result is added to the coulomb counter accumulator and the number of conversions is incremented in a 16-bit counter.
STC3105 functional description doc id 022198 rev 1 11/23 6.4 coulomb counter the coulomb counter is used to track the state-of-charge of the battery when the battery is charging or discharging at a high rate. each result of current conversion is accumulated into a 28-bit accumulator. the upper 16 bits of the accumulator are added to the soc base register to provide the current state-of-charge (soc) in the charge register. the system controller can control the coulomb counter, set the soc base register value and read the charge register through the i 2 c control registers. figure 4. coulomb counter block diagram when using an external 30 m ? sense resistor, the 28-bit accumulator results in a coulomb counter capacity of approximately +/- 7300 ma.h. the upper 16 bits used for the charge register give a resolution of 0.2 ma.h. 6.5 alarm output the alm pin provides an alarm signal in case of low battery condition. the output is an open drain, and an external pull-up resistor may be needed in the application. writing the io0data bit to 0 forces the alm output low; writing the io0data bit to 1 lets the alm output reflect the battery condition. reading the io0data bit gives the state of the alm pin. !$converter bit #' bit ac cumulator #harge register #urrent register register #ounter bit#ounter %/# #ontrollogic cg?enable cg?calibration cg?clock #ontrol registers (z cg?res 6 rd?req cg?rst 3/#base register 6 '!0-3-$
functional description STC3105 12/23 doc id 022198 rev 1 when the io0data bit is 1 and the alarm function is enabled by the alm_ena bit, the alm pin is driven low if either of these two conditions is met: battery state-of-charge (soc) less than the programmed threshold battery voltage less than the programmed low voltage level when a low-voltage or low-soc condition is triggered, the STC3105 drives the alm pin low and sets the alm_volt or alm_soc bit in reg_ctrl. the alm pin remains low (even if the conditions disappear) until the software writes the alm_volt and alm_soc bits to 0 to clear the interrupt. clearing the alm_volt or alm_soc while th e corresponding low-voltage or low-soc condition is still true does not generate another interrupt; this conditio n must disappear first and must be detected again before another interrupt (alm pin driven low) is generated for this alarm. the other alarm condition, if not yet triggered, can still generate an interrupt. usually, the low-soc alarm occurs first to warn the application of a low battery condition, then if no action is taken and the battery discharges further, the low-voltage alarm signals a nearly-empty battery condition. at power-up, or when the STC3105 is reset, the alarm output is disabled (alm_ena bit = 0), the threshold levels (low-voltage alarm, low-soc alarm) are cleared, and the base soc and relaxation counter are cleared. 6.6 battery voltage relaxation timer a battery relaxation timer is counted from the time that the current is below 0 and above the current threshold, meaning the battery is in a light-load condition. the relaxation counter register is an 8-bit read-only register clocked every 2 voltage conversion (8 s) and can go up to about 30 min; when the counter reaches its max value 0xff, it stops at this max value. the counter is cleared when the current is above 0 (charging) or below the current threshold (high rate discharge). the relaxation counter register is read from i 2 c by the gas gauge firmware to check that the battery voltage had enough time to relax from the last time the current was high or charging. the current threshold register is an 8-bit r/w register set by the gas gauge firmware from i 2 c. it can be programmed from 0.1 to 100% of the full scale current range with 0.4% steps figure 5. battery voltage relaxation counter &* edwwhu\ fxuuhqw fxuuhqwwkuhvkrog f k d u j l q j g l v f k d u j l q j 5(*b5(/$;b&2817(5 ?! [ ! ?[ig[ih[ii[ii [ii vwrsfrxqwlqjzkhquhdfklqj[ii '!0-3-$
STC3105 functional description doc id 022198 rev 1 13/23 6.7 timing diagram in run mode figures 6 and 7 describe the timing diagrams of the STC3105. it is assumed that the gas gauge has been reset with gg_rst before gg_run=1. figure 6. timing diagram in active run mode figure 7. timing diagram in power-saving run mode the voltage is measured first after gg_run bit is set to 1. the charge accumulator is updated every 500 ms using the last current value. the measurement cycles can be interrupted by setting gg_run=0 and the current conversion cycle is aborted. **b581elw &xuuhqw phdvxuhphqw &xuuhqwuhjlvwhu phdvxuhphqw 9,1yrowdjh 9rowdjhuhjlvwhu yrowdjh &kdujhdffxpxodwru &rqyhuvlrqfrxqwhu fxuuhqw fkdujh fxuuhqw fkdujh fxuuhqw fkdujh wl phv fxuuhqw fxuuhqw yrowdjh fxuuhqw fxuuhqw fkdujh fxuuhqw fkdujh fkdujh fkdujh fkdujh rqhphdvxuhphqwf\foh vhw**b(2&vljqdo vhw90b(2&vljqdo '!0-3-$ **b581elw &xuuhqw phdvxuhphqw &xuuhqwuhjlvwhu phdvxuhphqw 9,1yrowdjh 9rowdjhuhjlvwhu yrowdjh &kdujhdffxpxodwru &rqyhuvlrqfrxqwhu fxuuhqw fkdujh fxuuhqw fkdujh fxuuhqw fkdujh wlphv fxuuhqw fxuuhqw yrowdjh fxuuhqw fxuuhqw fkdujh fxuuhqw fkdujh fkdujh fkdujh fkdujh rqhphdvxuhphqwf\foh vhw**b(2&vljqdo vhw90b(2&vljqdo '!0-3-$
i 2 c interface STC3105 14/23 doc id 022198 rev 1 7 i 2 c interface 7.1 read and write operations the interface is used to control and read the current accumulator and registers. it is compatible with the philips i 2 c registered trademark (version 2.1). it is a slave serial interface with a serial data line (sda) and a serial clock line (scl). scl: input clock used to shift data sda: input/output bidirectional data transfers a filter rejects the potential spikes on the bus data line to preserve data integrity. the bidirectional data line supports transfers up to 400 kbit/s (fast mode). the data is shifted to and from the chip on the sda line, msb first. the first bit must be high (start) followed by the 7-bit device address and the read/write control bit. bits devaddr0 to devaddr2 are factory-programmable, the default device address value being 1110 000 (addrid0 = addrid1 = addrid2 = 0). the STC3105 then sends an acknowledge at the end of an 8-bit long sequence. the next 8 bits correspond to the register address followed by another acknowledge. the data field is the last 8-bit long sequence sent, followed by a last acknowledge. table 7. device address format b7 b6 b5 b4 b3 b2 b1 b0 1 1 1 0 devaddr2 devaddr1 devaddr0 r/w table 8 . register address format b7 b6 b5 b4 b3 b2 b1 b0 regaddr7 regaddr6 regaddr5 regaddr4 regaddr3 regaddr2 regaddr1 regaddr0 table 9. register data format b7 b6 b5 b4 b3 b2 b1 b0 data7 data6 data5 data4 data3 data2 data1 data0
STC3105 i 2 c interface doc id 022198 rev 1 15/23 figure 8 . read operation figure 9. write operation 3tart $eviceaddr 2egaddress bits ! 2estart $eviceaddr ! 2egdata bits ! 2egdata bits ! 2egdata bits ! !ddress n 3tartbit3$!fallingwhen3#, bits bits 3top ! 7 3topbit3$!risingwhen3#, 2estartbitstartafterastart -aster 3lave !cknowledge3$!forcedlowduringa3#,clock 2 !ddress n '!0-3-$ 3tart $eviceaddr 2egaddress bits ! 2egdata ! 2egdata bits ! 2egdata bits ! !ddress n 3tartbit3$!fallingwhen3#, bits bits 3top ! 7 3topbit3$!risingwhen3#, 2estartbitstartafterastart !ddress n '!0-3-$
i 2 c interface STC3105 16/23 doc id 022198 rev 1 7.2 register map the register space provides 17 control registers, 1 read-only register for device id and 16 read/write ram working registers reserved for the gas gauge algorithm. mapping of all registers is shown in table 10 . detailed descriptions of registers 0 (reg_mode) and 1 (reg_ctrl) are shown in table 11 and table 12 . all registers are reset to default values at power-on or reset, and the pordet bit in register reg_ctrl is used to indicate the occurrence of a power-on reset. values held in consecutive registers (such as the charge value in the reg_charge_low and reg_charge_high registers) must be read with a single i 2 c access to ensure data integrity. it is possible to r ead multiple values in one i 2 c access; all values will be consistent. table 10. register map name address (decimal) type description control registers 0 to 23 reg_mode 0 r/w mode register reg_ctrl 1 r/w control and status register reg_charge_low 2 r state-of-charge data, bits 0-7 reg_charge_high 3 r state-of-charge data, bits 8-15 reg_counter_low 4 r number of conversions, bits 0-7 reg_counter_high 5 r number of conversions, bits 8-15 reg_current_low 6 r battery current value, bits 0-7 reg_current_high 7 r battery current value, bits 8-15 reg_voltage_low 8 r battery voltage value, bits 0-7 reg_voltage_high 9 r battery voltage value, bits 8-15 reg_soc_base_low 10 r/w soc base value, bits 0-7 reg_soc_base_high 11 r/w soc base value, bits 8-15 reg_alarm_soc_low 12 r/w soc alarm level, bits 0-7 reg_alarm_soc_high 13 r/w soc alarm level, bits 8-15 reg_alarm_voltage 14 r/w battery low voltage alarm level reg_current_thres 15 r/w current threshold for the voltage relaxation counter reg_relax_count 16 r voltage relaxation counter device id register reg_id 24 r part type id = 12h ram registers 32 to 47 reg_ram0 32 r/w working register 0 for gas gauge ... ... ... reg_ram15 47 r/w working register 15 for gas gauge
STC3105 i 2 c interface doc id 022198 rev 1 17/23 the charge data is coded in 2?s complement format, and the lsb value is 6.70 uv.h. the battery current is coded in 2?s complement format, and the lsb value is 11.77 uv. the battery voltage is coded in binary format, and the lsb value is 2.44 mv. table 11. reg_mode - address 0 name pos. type def. description 0 unused 1 r/w 0 reserved. write this bit to 0. pwr_save 2 r/w 0 0: active mode, 1: power-saving mode alm_ena 3 r/w 0 alarm function: 0: disabled, 1: enabled gg_run 4 r/w 0 0: standby mode. accumulator and counter registers are frozen, gas gauge and battery monitor functions are in standby. 1: operating mode. [7..5] unused table 12. reg_ctrl - address 1 name pos. type def. description io0data 0 rx alm pin status: 0 = alm input is low, 1 = alm input is high w1 alm pin output drive: 0 = alm is forced low, 1 = alm is driven by the alarm conditions gg_rst 1 w 0 0: no effect 1: resets the charge accu mulator and conversion counter. gg_rst is a self-clearing bit. gg_eoc 2 r 0 set at the end of a battery current conversion cycle. clears upon reading. vm_eoc 3 r 0 set at the end of a battery voltage conversion cycle. clears upon reading. pordet 4 r1 power on reset (por) detection bit: 0 = no por event occurred, 1 = por event occurred w0 soft reset: 0 = release the soft-reset and clear the por detection bit, 1 = assert the soft-reset and set the por detection bit. alm_soc 5 r/w 0 set by a low-soc condition. cleared by writing 0. alm_volt 6 r/w 0 set by a low-voltage condition. cleared by writing 0. 7 unused
package information STC3105 18/23 doc id 022198 rev 1 8 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com. ecopack ? is an st trademark.
STC3105 package information doc id 022198 rev 1 19/23 8 .1 tdfn 8 package information figure 10. tdfn 8 3 x 2 x 0.75 mm package mechanical drawing (pitch 0.65 mm) gapm s md000 33
package information STC3105 20/23 doc id 022198 rev 1 figure 11. recommended land pattern table 13. tdfn 8 3 x 2 x 0.75 mm package mechanical data (pitch 0.65 mm) ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 0.02 0.05 0.000 0.000 0.002 b 0.25 0.30 0.35 0.010 0.012 0.014 d 2.90 3.00 3.10 0.114 0.118 0.122 e 1.90 2.00 2.10 0.075 0.079 0.083 e 0.65 0.026 l 0.45 0.55 0.65 0.018 0.022 0.026 l1 0.55 0.65 0.75 0.022 0.026 0.030 gapm s md000 3 4
STC3105 ordering information doc id 022198 rev 1 21/23 9 ordering information table 14. order codes part number temperature range package packing marking STC3105iqt -40c, +85c tdfn8 3 x 2 tape and reel o203
revision history STC3105 22/23 doc id 022198 rev 1 10 revision history table 15. document revision history date revision changes 07-sep-2011 1 first release.
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